Manufacturability and robust design of nanoelectronic logic circuits basedon resonant tunnelling diodes

The manufacturability of logic circuits based on quantum tunnelling devices , namely double-barrier resonant tunnelling diodes (RTD), is studied in det ail. The homogeneity and reproducibility of III/V mesa technology-based dev ices is experimentally evaluated and interpreted using multiple I-V charact eristic simulations. The experimental sensitivity of the RTD I-V parameters on well and barrier thickness is compared cd with multiple I-V simulations . With shrinking minimum feature size the fluctuations in the peak current can be directly attributed to an RTD area variation caused by the increasin g impact of lithography and etching on lateral dimensions. These results pr ove that the III/V technology fulfils the requirements for a large scale in tegration of RTD devices. A nanoelectronic circuit architecture based on an improved MOBILE threshold logic gate is presented. Detailed SPICE simulati ons using the experimental data show that clock and supply voltage fluctuat ions are tolerated up to +/-0.1 V at a supply voltage of 0.7 V. Very strong local peak voltage variations of 15 per cent in opposite directions would be necessary to have a critical impact on to the circuit Functionality. Sma ller deviations only affect the timing without degrading the reliability of the circuit. Consequently, the design of a stable power supply and clockin g scheme is more important for the overall circuit performance than the sma ll relative deviations of the RTD peak voltage. Copyright (C) 2000 John Wil ey & Sons, Ltd.