Suppression of Si cavities at the SiC/Si interface during epitaxial growthof 3C-SiC on silicon-on-insulator

Epitaxial growth of 3C-SiC on silicon on insulator (SOI) has certain advant ages over the deposition on Si wafers. The existing buried oxide layer isol ates the SiC overgrown from the Si substrate preventing the leaf; current t hrough the Si substrate even at high temperatures. During the SiC depositio n, SOI is more sensitive in the formation of cavities in the Si at the SiC/ Si interface than in bulk Si, because only the thin Si overlayer is the res ervoir for the Si supply during carbonization process. The evolution of cav ities in the Si overlayer (SOL) was studied vs, carbonization process, SiC growth rate, SOL thickness, and thickness of the 3C-SiC overgrown. There ar e three main reasons for the formation of the cavities: (i) the consumption of Si from the Si overlayer for the formation of the SIC buffer layer duri ng the carbonization process, (ii) the out-diffusion of Si through the 3C-S iC overgrown during deposition of SIC, and (iii) the balling up of the Si a t the edges of the cavities due to the instability of the Si/SiO2 system at high temperatures. Knowing the mechanisms responsible for the formation of the cavities, the SiC deposition conditions were modified in order to supp ress cavities. Thus the deposition temperature was reduced to 1200 degreesC , as reactive gas was used methylsilane, finally fast deposition rate in th e early stage of growth, followed by the standard rare as the growth advanc es, significantly suppresses the cavities giving 3C-SiC comparable with the standard 3C-SiC grown under a one-step process. (C) 2000 The Electrochemic al Society. S0013-4651(00)03-10 1-3. All rights reserved.