New CAD & IP directions

This paper presents a perspective an CAD tools and IP blacks for System On Chip (SOC). It is based on experience gained in a leading semiconductor man ufacturer - STMicroelectronics - where technical and organizational factors intertwine to give a complex working environment. Having set the industria l context we identify key issues related to CAD and IF, based on project po st-mortem results and IP reuse training feedback. The issues raised are IP predictability, speed of IP integration, IP quality, Functional Verificatio n and Project Management. We then describe and discuss emerging solutions i n each of these areas, and our experience in implementation and deployment. The analysis is then extended to consider the recently introduced paradigm of Platform-Based Design. In this context, techniques for architectural an alysis and a comprehensive On Chip Bus infrastructure become critical. Our experience and current activities in these two areas are briefly described. Finally, a number of objectives far future CAD and IP development are prop osed.