A physically based compact model of partially depleted SOI MOSFETs for analog circuit simulation

In this paper, the Southampton Thermal AnaloGue (STAG) compact model for pa rtially depleted (PD) silicon-on-insulator (SOI) MOSFETs is presented. The model uses a single expression to model the channel current, thereby ensuri ng continuous transition between all operating regions. Furthermore, care h as been taken to ensure that this expression is also infinitely differentia ble, resulting in smooth and continuous conductances and capacitances as we ll as higher order derivatives. Floating-body effects, which are particular to PD SOI and which are of concern to analog circuit designers in this tec hnology, are well modeled. Small geometry effects such as channel length mo dulation (CLM), drain-induced barrier lowering (DIBL), charge sharing, and high field mobility effects have also been included. Self-heating (SH) effects are much more apparent in SOI devices than in equ ivalent bulk devices. These have been modeled in a consistent manner, and t he implementation in SPICE3f5 gives the user an additional thermal node whi ch allows internal device temperature rises to be monitored and also accomm odates the modeling of coupled heating between separate devices, The model has been successfully used to simulate a variety of circuits which commonly cause problems with convergence, Due to its inherent robustness, the model can normally achieve convergence without recourse to the setting of initia l nodal voltage estimates.