A compositional model for the functional verification of high-level synthesis results

Citation
D. Borrione et al., A compositional model for the functional verification of high-level synthesis results, IEEE VLSI, 8(5), 2000, pp. 526-530
Citations number
17
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN journal
10638210 → ACNP
Volume
8
Issue
5
Year of publication
2000
Pages
526 - 530
Database
ISI
SICI code
1063-8210(200010)8:5<526:ACMFTF>2.0.ZU;2-O
Abstract
High-level synthesis systems, such as Amical, translate a behavioral descri ption to an abstract automaton in which the states are decision and synchro nization points, and operations are executed on the state transitions. Afte r the scheduling and allocation of the functional units, the system is mode led as the interconnection of an operative and a control part. To formally verify this synthesis mechanism, we combine a detailed state encoding of th e control part with an abstract view of the data part. We only compute the set of reachable states of the control part, and compose functional express ions in the data part. We show that, for each two corresponding state trans itions in the abstract automaton and in the synthesized control part, the e xpressions computed in the data registers and outputs are equal.