The focus of high-level built-in self-test (BIST) synthesis is register ass
ignment, which involves system register assignment, BIST register assignmen
t, and interconnection assignment, To reduce the complexity involved in the
assignment process, existing high-level BIST synthesis methods decouple th
e three tasks and perform the tasks sequentially at the cost of global opti
mality, They also try to achieve only one objective: minimizing either area
overhead or test time, Hence, those methods do not render exploration of l
arge design space, which may result in a local optimum. In this paper, we p
ropose a new approach to the BIST data path synthesis based on integer line
ar programming that performs the three register assignment tasks concurrent
ly to yield optimal designs. In addition, our approach finds an optimal reg
ister assignment for each k-test session. Therefore, it offers a range of d
esigns with different figures of merit in area and test time. Our experimen
tal results show that our method successfully synthesizes a BIST circuit fo
r every k-test session for all six circuits experimented, All the BIST circ
uits are better in area overhead than those generated by existing high-leve
l BIST synthesis methods.