Line coverage of path delay faults

We propose a new coverage metric for delay fault tests. The coverage is mea sured for each line with a rising and a falling transition, but the test cr iterion differs from that of the slow-to-rise and slow-to-fall transition f aults. A line is tested by a line delay test, which is a robust path delay test for the longest sensitizable path producing a given transition on the target line. Thus, the test criterion resembles path delay test and not the gate or transition delay test, Yet, the maximum number of tests (or faults ) is limited to twice the number of lines. In a two-pass test-generation pr ocedure, we first attempt delay tests for a minimal set of longest paths fo r all lines. Fault simulation is used to determine the coverage metric. For uncovered lines, in the second pass, several paths of decreasing lengths a re targeted. We give results for several benchmark circuits.