Analysis of power dissipation in double edge-triggered flip-flops

Authors
Strollo, AGM Napoli, E Cimino, C
Citation
Agm. Strollo et al., Analysis of power dissipation in double edge-triggered flip-flops, IEEE VLSI, 8(5), 2000, pp. 624-629
Citations number
14
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN journal
10638210 → ACNP
Volume
8
Issue
5
Year of publication
2000
Pages
624 - 629
Database
ISI
SICI code
1063-8210(200010)8:5<624:AOPDID>2.0.ZU;2-9
Abstract
A comprehensive analysis of double edge-triggered (DET) flip-flops' pou er dissipation, tailing into account input signal statistics, is presented in this paper. It is shown that using DET instead of a single edge-triggered f lip-flop may result in significant energy savings if the input signal has r educed activity, On the other hand, the high switching rate of DET internal nodes may result in larger power dissipation if the input signal has a hig h transition probability or significant glitching.