Processing techniques for InGaAs/InAlAs/InGaAs spin field effect transistors

Authors
LaRoche, JR Ren, F Temple, D Pearton, SJ Kuo, JM Baca, AG Cheng, P Park, YD Hudspeth, Q Hebard, AF Arnason, SB
Citation
Jr. Laroche et al., Processing techniques for InGaAs/InAlAs/InGaAs spin field effect transistors, SOL ST ELEC, 44(12), 2000, pp. 2117-2122
Citations number
12
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Eletrical & Eletronics Engineeing
Journal title
SOLID-STATE ELECTRONICS
ISSN journal
00381101 → ACNP
Volume
44
Issue
12
Year of publication
2000
Pages
2117 - 2122
Database
ISI
SICI code
0038-1101(200012)44:12<2117:PTFISF>2.0.ZU;2-O
Abstract
Wet etch processing techniques For InGaAs/Inal/As/InGaAs transistors are us ed to Fabricate an N-channel HEMT (High Electron Mobility Transistor) with Fe contacts. These processing techniques can easily be extended for dilute magnetic semiconductor regrowth and for testing of various spin injection g eometries. (C) 2000 Elsevier Science Ltd, All rights reserved,