A new CMOS DC voltage doubler with nonoverlapping switching control is prop
osed, in order to eliminate the dynamic current loss during switching as we
ll as the threshold voltage drop of the serial switches. The simulated re s
uits at 1.5 V show that the maximum power efficiency is improved with about
30% whereas the efficiency in the low output current region is larger than
5 times compared to the conventional voltage doublers. This proposed CMOS
DC voltage doubler can be used as a VPP generator of low voltage DRAM's.