A current-mode folding/interpolating CMOS A/D converter with multiplied folding amplifiers

Authors
Kim, HH Yoon, KS
Citation
Hh. Kim et Ks. Yoon, A current-mode folding/interpolating CMOS A/D converter with multiplied folding amplifiers, IEICE T FUN, E84A(2), 2001, pp. 563-567
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES
ISSN journal
09168508 → ACNP
Volume
E84A
Issue
2
Year of publication
2001
Pages
563 - 567
Database
ISI
SICI code
0916-8508(200102)E84A:2<563:ACFCAC>2.0.ZU;2-O
Abstract
A current-mode folding and interpolating analog to digital converter (ADC) architecture with multiplied folding amplifiers is proposed in this paper. A current-mode multiplied folding amplifier is employed not only to reduce the number of reference current source, but also to decrease a power dissip ation within the ADC. The proposed ADC for 12 bit was designed by a 0.65 mu m n-well CMOS single poly/double metal process. The simulated result shows a differential nonlinearity (DNL) of +/-0.5LSB, an integral nonlinearity (I NL) of +/-1.0LSB, 20 Ms/s of the data conversion rate, and the power dissip ation of 180 mW with a power supply of 5 V.