Spike thermal annealing is examined for electrical activation of B implants
into 100 nm Si films deposited over 1.5 to 2.4 nm thermally grown SiO2. Th
ese structures simulate gate stacks in advanced p-type metal-oxide-Si (PMOS
) devices. Spike anneals, at minimized thermal budget, are shown to yield h
igher carrier concentrations in PMOS polycrystalline-silicon (poly-Si), as
compared to conventional rapid thermal annealing. The activation energy for
B diffusion through SiO2 is found to be 3.71 to 3.83 eV and near that prev
iously reported for furnace anneals. Boron penetration appears unaffected b
y photoexcitation from heating lamps. (C) 2001 American Institute of Physic
s.