Design issues of a three-dimensional packaging scheme for power modules

Authors
Haque, S Siddabattula, K Craven, M Wen, SH Liu, XS Boroyevich, D Lu, GQ
Citation
S. Haque et al., Design issues of a three-dimensional packaging scheme for power modules, MICROEL REL, 41(2), 2001, pp. 295-305
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
41
Issue
2
Year of publication
2001
Pages
295 - 305
Database
ISI
SICI code
0026-2714(200102)41:2<295:DIOATP>2.0.ZU;2-#
Abstract
This paper presents design issues of a novel three-dimensional packaging ap proach for power modules. Solder interconnections are implemented on power devices (insulated gate bipolar transistors and diodes) to obtain vertical interconnections for the proposed multi-layer packaging technique. Issues r elated to materials selection and processing, electrical and thermo-mechani cal aspects of implementing the new packaging concept are discussed. (C) 20 01 Elsevier Science Ltd. All rights reserved.