A new top gate polysilicon thin-film transistor (TFT) architecture is intro
duced which requires only a single laser process step to simultaneously cry
stallize the channel and activate the source-drain, The dummy-gate TFT (DGT
FT) uses a light blocking layer patterned with the gate mask combined with
two backside expose steps to allow a self- aligned device structure, N-chan
nel TFTs fabricated using the new process have held effect mobilities great
er than 100 cm(2)/Vs. By controlling the backside exposures it is also poss
ible to form offset or graded doping structures to reduce field enhanced le
akage currents.