A new laser-processed polysilicon TFT architecture

Citation
Rt. Fulks et al., A new laser-processed polysilicon TFT architecture, IEEE ELEC D, 22(2), 2001, pp. 86-88
Citations number
8
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
07413106 → ACNP
Volume
22
Issue
2
Year of publication
2001
Pages
86 - 88
Database
ISI
SICI code
0741-3106(200102)22:2<86:ANLPTA>2.0.ZU;2-S
Abstract
A new top gate polysilicon thin-film transistor (TFT) architecture is intro duced which requires only a single laser process step to simultaneously cry stallize the channel and activate the source-drain, The dummy-gate TFT (DGT FT) uses a light blocking layer patterned with the gate mask combined with two backside expose steps to allow a self- aligned device structure, N-chan nel TFTs fabricated using the new process have held effect mobilities great er than 100 cm(2)/Vs. By controlling the backside exposures it is also poss ible to form offset or graded doping structures to reduce field enhanced le akage currents.