Limited maximum fault-multiplicity diagnosis procedure for scan designs

A new effect-cause approach to multiple fault diagnosis in digital circuits is presented. The previous elimination algorithm is extended to sequential circuits. A new procedure capable of diagnosing any 'stuck-at' type fault with limited maximum multiplicity in full scan or partial scan designs is d eveloped. The limit is established for each logic partition of the circuit. With this new algorithm, any trial that would lead to faults of multiplici ty greater than the established limit is determined a priori and is rejecte d. This greatly reduces the diagnostic computing time, without affecting it s utility, and without probing any internal line. It can also obtain masked faults with or without a multiplicity limit. Experimental results for some full scan circuits from the ISCAS'89 benchmarks are included.