This work presents a study of the extended counting technique for a 1.2-V m
icropower voice band A/D converter, This extended counting technique is a b
lend of Sigma Delta modulation with its high resolution but relatively low
Speed and algorithmic conversion with its higher speed but lower accuracy.
To achieve this, the converter successively operates first as a first-order
Sigma Delta modulator to convert the most significant bits, and then the s
ame hardware is used as an algorithmic converter to convert the remaining l
east significant bits.
An experimental prototype was designed in 0.8-mum CMOS, With a 1.2-V power
supply, it consumes 150 muW of power at a 16-kHz Nyquist sampling frequency
. The measured peak S/(N + THD) was 80 dB and the dynamic range 82 dB, The
converter core including the controller and all reconstruction logic occupi
es about 1.3 x 1 mm(2) of chip area. This is considerably less than a compl
ete Sigma Delta modulation A/D converter where the digital decimation filte
r would occupy a significant amount of chip area.