QSERL: Quasi-static energy recovery logic

A new quasi-static energy recovery logic family (QSERL) using the principle of adiabatic switching is proposed in this paper. Most of the previously p roposed adiabatic logic styles are dynamic and require complex clocking sch emes. The proposed QSERL uses two complementary sinusoidal supply clocks an d resembles behaviors of static CMOS, Thus, switching activity is significa ntly lower than dynamic logic, In addition, QSERL circuits can be directly derived from static CMOS circuits, A high-efficiency clock generation circuitry, which generates two complemen tary sinusoidal clocks compatible to QSERL, is also presented in this paper . The adiabatic clock circuitry locks the frequency of clack signals, which makes it possible to integrate adiabatic modules into a VLSI system. We have designed an 8 x 8 carry-save multiplier using QSERL logic and two p hase sinusoidal clocks, SPICE simulation shows that the QSERL multiplier ca n save 34% of energy over static CMOS multiplier at 100 MHz.