Design and implementation of a switched-current memory cell for low-power and weak-current operations

This paper describes the design and implementation of a new switched-curren t (SI) memory cell for current-mode signal processing. The SI memory cell o perates in a pico-to-nanoampere range. To obtain an acceptable accuracy, a procedure to reduce the negative effects of the nonideal characteristics of MOS transistor in SI circuits is proposed and implemented. A prototype cir cuit including the new SI memory cell associated with optical sensors has b een fabricated with a 0.35-mum n-well technology, The test results show tha t, in a range of 0.5 pA to 15 nA, the error rate of current memorization/re production in the proposed SI memory is below 1% and the power dissipation is in a range of nanowatts or below.