In this paper, the algorithm and architecture of a variable-length-code (VL
C) codec system using a new group-based approach and achieving full table p
rogrammability are presented. According to the proposed codeword grouping a
nd symbol memory mapping, both group searching and encoding/decoding proced
ures are completed by applying numerical properties and arithmetic operatio
ns to codewords and symbol addresses, By a novel symbol conversion, the mem
ory requirement of the encoding process is reduced and the programmability
of codewords and symbols is achieved, For MPEG applications, a 0.6-mum CMOS
design that performs concurrent VLC codec processes is shown. This VLSI im
plementation occupies an area of 5.0 x 4.5 mm(2) with 110 k transistors and
satisfies a coding table up to 256-entry 12-bit symbols and 16-bit codewor
ds, In addition, both encoding and decoding throughputs of this design achi
eve 100 Msymbols/s at a 100-MHz clock rate. Therefore, the proposed VLC cod
ec system is suitable for applications which require high operation through
put, such as HDTV, and simultaneous compression and decompression, such as
videoconferencing.