CMOS op-amp sizing using a geometric programming formulation

The problem of CMOS op-amp circuit sizing is addressed here. Given a circui t and its performance specifications, the goal is to automatically determin e the device sizes in order to meet the given performance specifications wh ile minimizing a cost function, such as a weighted sum of the active area a nd power dissipation. The approach is based on the observation that the fir st order behavior of a MOS transistor in the saturation region is such that the cost and the constraint functions for this optimization problem can be modeled as posynomial in the design variables. The problem is then solved efficiently as a convex optimization problem. Second order effects are then handled by formulating the problem as one of solving a sequence of convex programs. Numerical experiments show that the solutions to the sequence of convex programs converge to the same design point for widely varying initia l guesses. This strongly suggests that the approach is capable of determini ng the globally optimal solution to the problem. Accuracy of performance pr ediction in the sizing program (implemented in MATLAB) is maintained by usi ng a newly proposed MOS transistor model and verified against detailed SPIC E simulation.