New degradation mechanisms of width-dependent hot carrier effect in quarter-micron shallow-trench-isolated p-channel metal-oxide-semiconductor field-effect-transistors

In this study, width-dependent hot-carrier degradation in the p-channel met al-oxide-semiconductor held-effect transistors (p-MOSFETs) with shallow-tre nch-isolation (STI) is presented. Results show an enhanced drain current de gradation with reducing the gate width. A new model and mechanism are propo sed to explain the width-dependent hot-carrier (HC) degradation for p-MOSFE Ts. Based on a two-dimensional channel shortening concept, a new model is d eveloped. The mechanical stress enhanced oxide damage at the STI edge, whic h will induce channel shortening, is the dominant mechanism for the drain c urrent degradation of the devices after hot-carrier stress. This is a cruci al issue for present and future complementary metaloxide semiconductor (CMO S) ultra-large-scale integration (ULSI), and in particular for high-density dynamic random-access memory (DRAM), fabricated using STI technologies.