Numerical simulation of fatigue crack growth in microelectronics solder joints

Citation
K. Kaminishi et al., Numerical simulation of fatigue crack growth in microelectronics solder joints, CMES-COMP M, 1(1), 2000, pp. 107-110
Citations number
8
Categorie Soggetti
Computer Science & Engineering
Journal title
CMES-COMPUTER MODELING IN ENGINEERING & SCIENCES
ISSN journal
15261492 → ACNP
Volume
1
Issue
1
Year of publication
2000
Pages
107 - 110
Database
ISI
SICI code
1526-1492(2000)1:1<107:NSOFCG>2.0.ZU;2-Q
Abstract
An FEA (finite element analysis) program employing a new scheme for crack g rowth analysis is developed and a prediction method for crack growth life i s proposed. The FEA program consists of the subroutines for the automatic e lement re-generation using the Delaunay Triangulation technique, the elemen t configuration in the near-tip region being provided by a super-element, e lasto-inelastic stress analyses, prediction of crack extension path and cal culation of fatigue life. The FEA results show that crack extension rate an d path are controlled by a maximum opening stress range, Delta sigma theta (max), at a small radial distance of r = d, where d is chosen to be a grain diameter's distance, 3.5 mum, in solder material. The experimentally obtai ned crack extension rate is found to be related to doe,,, in FEA as da/dN = beta[Delta sigma (theta max) - gamma](alpha), where alpha = 2.0, beta = 4. 5 x 10(-9) mm(5)/N-2 and gamma = 98 MPa are determined for all test conditi ons. The calculated values of crack extension life by the FEA using the abo ve equation are in good agreement with the experimental ones and are indepe ndent of the joint types.