A system model for feedback control and analysis of yield: A multistep process model of effective gate length, poly line width, and IV parameters

Citation
Ea. Rietman et al., A system model for feedback control and analysis of yield: A multistep process model of effective gate length, poly line width, and IV parameters, IEEE SEMIC, 14(1), 2001, pp. 32-47
Citations number
36
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
ISSN journal
08946507 → ACNP
Volume
14
Issue
1
Year of publication
2001
Pages
32 - 47
Database
ISI
SICI code
0894-6507(200102)14:1<32:ASMFFC>2.0.ZU;2-U
Abstract
We present a large system model capable of producing Pareto charts for seve ral yield metrics, including effective channel length, poly line width, I-o n and I-sub. These Pareto charts enable us to target specific processes for improvement of the yield metric(s), Our neural network model has an accura cy of 80% and can be trained with a small data set to minimize the feedback time in the control loop for the yield. The system we describe has been im plemented in a Lucent Technologies microelectronics lab in Orlando, FL.