Cycle-time improvements for photolithography process in semiconductor manufacturing

Cycle-time reduction is of great importance to semiconductor manufacturers. Photolithography, being one of the most repeated processes, is an area whe re substantial improvements can be made. We investigate the effects of vari ous process control mechanisms for photolithography on the cycle-time at th e process and at the overall fab via a simulation study. Test run policy at the photolithography station, test run frequency, duration of inspection, and machine dedication policy for the equipment are the factors we consider . Equipment down time due to preventive or breakdown maintenance and rework rates are also taken into account. Parallel testing, where test wafer is i nspected while the lot is being processed, is the best policy in terms of c ycle-time performance. Long inspection time and infrequent, long down times have the most adverse effects, but flexible machine assignment may reduce the impact of down times, Test run frequency is only significant for serial testing, where processing of the lot is not finished until the failed test wafer is stripped and reworked.