At crystallization temperatures of about 800 degreesC bismuth layered oxide
SrBi2Ta2O9 (SBT) deposited by MOD develops good ferroelectric properties f
or use in FeRAM devices. But scaling down the film thickness of SET below 1
50 nm only shorts are measured at this crystallization temperature after to
p electrode deposition. Working Pt/SBT/Pt-capacitors are achieved by reduci
ng the crystallization temperature. Also temperatures of 800 degreesC are t
oo high for. integration of the SET module in a stacked capacitor architect
ure for high density memory devices. Therefore. a process is needed to redu
ce the crystallization temperature of SET, called "Low Temperature Process"
.
In this work the electric properties of spin-on processed SET crystallized
in a temperature window from 650 degreesC up to 800 degreesC are investigat
ed. As shown by XRD: transition of the nonferroelectric Fluorite phase to t
he Aurivillius phase rakes place at approximately 625 degreesC. Increasing
the crystallization temperature gives better crystallized SET films with bi
gger SET grains. However, film porosity is also increasing with temperature
. Electrical results of stoichiometric variations of SET are presented. SEM
pictures show that cluster formation is correlated with less film porosity
at lower temperatures.