Low-voltage analog tripler circuit

Authors
Chang, CC Liu, SI Hwang, YS
Citation
Cc. Chang et al., Low-voltage analog tripler circuit, ANALOG IN C, 26(2), 2001, pp. 125-128
Citations number
12
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN journal
09251030 → ACNP
Volume
26
Issue
2
Year of publication
2001
Pages
125 - 128
Database
ISI
SICI code
0925-1030(200102)26:2<125:LATC>2.0.ZU;2-4
Abstract
A new low-voltage CMOS tripler is presented in this paper. It is realized b y the square-law characteristics of MOS transistors operating in saturation . The proposed circuit has been fabricated in a 0.8 mum CMOS process. Exper imental results have been given to demonstrate the feasibility of the propo sed circuit. It is expected to be useful in low-voltage analog signal-proce ssing applications.