Demonstration of an analog IC function maintenance strategy, including direct calibration, built-in self-test, and commutation of redundant functional blocks

A new analog subsystem maintenance strategy is presented that can be used t o improve the accuracy, reliability, yield, and testability of analog and m ixed-signal ICs. This scheme is a generally applicable design approach that combines hybrid redundancy, direct subcircuit parameter adjustment (calibr ation), and on-chip analog function verification (built-in self-test). Impr ovements are realized in a system-transparent fashion through careful funct ion block commutation. The cost is a moderate die area increase. This desig n strategy is applicable to a wide range of moderately complex analog funct ions. An example analog function is used here to illustrate this new mainte nance approach. Experimental data demonstrate the capabilities of this new approach to analog IC design for testability.