A system-on-chip prototype implementing a full integration of a 64-minutes
digital voice recorder/player and embedding a 4-b/cell multilevel digital f
lash memory is presented in this paper. A hardwired adaptive-differential p
ulse-code modulation speech coder/decoder (8 to 40 kb/s) and a microcontrol
ler are integrated into a bus-centric architecture. An 8-cell/32-Mb multile
vel flash memory is used as an embedded mass storage media and a fully digi
tal on-chip built-in-self-test solution is presented.
This speech recording system features a modular architecture allowing full
reuse and mix-and-match of its IP building blocks. The architecture of the
system and solutions for implementing embedded multilevel flash memories ar
e presented. System operation modes are described shelving how the desired
message editing functionality is implemented by a mixed hardware/software s
olution. The chip is 3-V-only and it counts 13 M transistors at 225 mm(2) a
rea in a 0.5-mum embedded flash technology.