A novel interpolation approach for reducing clock-rate in multilevel decision feedback equalization detectors

The multilevel decision feedback equalization (MxDFE) family of detectors p rovides excellent performance over (1, 7)-coded magnetic recording channels , while being simple in structure. However, the reduced code-rate of 2/3 in creases the channel data rate by 50% compared to the user data rate. Althou gh this is not a problem for the write heads because of the reduced bandwid th of the (1, 7) writing signal [compared with (0, k) codes], it becomes an issue at the detector side for high-data-rate applications. We propose a n ovel interpolation approach for reducing the detector clock rate. Performan ce simulations of MDFE and M2DFE detectors, carried out over different user densities, channel models, and equalizer configurations, show that the pro posed scheme can reduce the detector clock rate to the user rate with negli gible impact on performance. We also present a timing recovery scheme for a cquisition and tracking of the reduced-rate clock.