Computation for electromigration in interconnects of microelectronic devices

Citation
A. Averbuch et al., Computation for electromigration in interconnects of microelectronic devices, J COMPUT PH, 167(2), 2001, pp. 316-371
Citations number
33
Categorie Soggetti
Physics
Journal title
JOURNAL OF COMPUTATIONAL PHYSICS
ISSN journal
00219991 → ACNP
Volume
167
Issue
2
Year of publication
2001
Pages
316 - 371
Database
ISI
SICI code
0021-9991(20010301)167:2<316:CFEIIO>2.0.ZU;2-5
Abstract
Reliability and performance of microelectronic devices depend to a large ex tent on the resistance of interconnect lines. Voids and crafts may occur in the interconnects, causing a severe increase in the total resistance and e ven open circuits. In this work we analyze void motion and evolution due to surface diffusion effects and applied external voltage. The interconnects under consideration are three-dimensional (sandwich) constructs made of a v ery thin metal film of possibly variable thickness attached to a substrate of nonvanishing conductance. A two-dimensional level set approach was appli ed to study the dynamics of the moving (assumed one-dimensional) boundary o f a void in the metal film. The level set formulation of an electromigratio n and diffusion model results in a fourth-order nonlinear (two-dimensional) time-dependent PDE. This equation was discretized by finite differences on a regular grid in space and a Runge-Kutta integration scheme in time, and solved simultaneously with a second-order static elliptic PDE describing th e electric potential distribution throughout the interconnect line. The wel l-posed three-dimensional problem for the potential was approximated via si ngular perturbations, in the limit of small aspect ratio, by a two-dimensio nal elliptic equation with variable coefficients describing the combined lo cal conductivity of metal and substrate (which is allowed to vary in time a nd space). The difference scheme for the elliptic PDE was solved by a multi grid technique at each time step. Motion of voids in both weak and strong e lectric fields was examined, and different initial void configurations were considered, including circles, ellipses, polygons with rounded corners, a butterfly, and long grooves. Analysis of the void behavior and its influenc e on the resistance gives the circuit designer a tool for choosing the prop er parameters of an interconnect (width-to-length ratio, properties of the line material, conductivity of the underlayer, etc.). (C) 2001 Academic Pre ss.