Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition

Citation
Dk. Dosev et al., Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition, THIN SOL FI, 383(1-2), 2001, pp. 307-309
Citations number
9
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
THIN SOLID FILMS
ISSN journal
00406090 → ACNP
Volume
383
Issue
1-2
Year of publication
2001
Pages
307 - 309
Database
ISI
SICI code
0040-6090(20010215)383:1-2<307:AOBSOT>2.0.ZU;2-S
Abstract
The stability under gate bias stress of unpassivated thin film transistors was studied by measuring the transfer and output characteristics at differe nt temperatures. The active layer of these devices consisted of in nanocrys talline silicon deposited at 125 degreesC by Hot-Wire Chemical Vapour Depos ition. The dependence of the subthreshold activation energy on gate bias fo r different gate bias stresses is quite different from the one reported for hydrogenated amorphous silicon. This behaviour has been related to trapped charge in the active layer of the thin film transistor. (C) 2001 Elsevier Science B.V. All rights reserved.