A major defect concern in fusion-bonded wafer pairs, as well as in wafers b
onded by other methods, is the presence of a void or micro-voids between th
e two wafers. Although a void may be very small in area and extremely thin,
it can still have devastating impact on device performance. Among companie
s involved in bonding wafers, usually for MEMS or analogue device applicati
ons, the tolerance for such voids is zero.