Power management in the Amulet microprocessors

Authors
Furber, SB Lloyd, DW Efthymiou, A Lewis, MJG Garside, JD Temple, S
Citation
Sb. Furber et al., Power management in the Amulet microprocessors, IEEE DES T, 18(2), 2001, pp. 42-52
Citations number
8
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE DESIGN & TEST OF COMPUTERS
ISSN journal
07407475 → ACNP
Volume
18
Issue
2
Year of publication
2001
Pages
42 - 52
Database
ISI
SICI code
0740-7475(200103/04)18:2<42:PMITAM>2.0.ZU;2-N
Abstract
Amulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has posi tive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wast eful activity.