A programmable continuous-time floating-gate Fourier processor

Citation
M. Kucic et al., A programmable continuous-time floating-gate Fourier processor, IEEE CIR-II, 48(1), 2001, pp. 90-99
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
ISSN journal
10577130 → ACNP
Volume
48
Issue
1
Year of publication
2001
Pages
90 - 99
Database
ISI
SICI code
1057-7130(200101)48:1<90:APCFFP>2.0.ZU;2-N
Abstract
We present a programmable continuous-time floating-gate Fourier processor t hat decomposes the incoming signal into frequency bands by analog bandpass filters, multiplies each channel by a nonvolitile weight, and then recombin es the Frequency channels. A digital signal processor would take a similar approach of computing a fast Fourier transform (FFT), multiplying the frequ ency components by a weight and then computing an inverse FFT. We decompose the frequency bands of the incoming signal using the transistor-only versi on of the autozeroing floating-gate amplifier (AFGA), also termed the capac itively coupled current conveyer (C-4). Each band decomposition is then fed through a floating-gate multiplier to perform the band weighting, Finally, the multiplier outputs are summed using Kirchoff current law to give a ban d-weighted output of the original signal. We examine many options to reduce second-order harmonic problems inherent in the single-sided C4. We present a method for programming arrays of floating-gate devices that are used in the weighting of the bands. All of these pieces fit together to form an ele gant and systematic Fourier processor.