This paper proposes a novel sampling algorithm for digital signal processin
g (DSP) controlled 2 kW power factor correction (PFCs) converters, which ca
n improve switching noise immunity greatly in average-current-control power
supplies. Based on the newly developed DSP chip TMS320F240, a 2 kW PFC sta
ge is implemented. The novel sampling algorithm shows great advantages when
the converter operates at a frequency above 30 kHz.