Design of a two-dimensional discrete wavelet transform core for image compression

In the last decade, the amount of image data processed by systems has been rapidly growing, resulting in the need for a good image compression techniq ue. JPEG based on DCT is one of the popular techniques. The major problems of JPEG are low quality at a high compression ratio and block artifacts. Re cently, many research efforts on compression techniques based on wavelet tr ansforms have been pursued to overcome these problems. This paper describes the architecture and the design of a two-dimensional discrete wavelet and inverse transform core that will be used as a module in an image compressio n and decompression chip. The resulting circuit consists of 16,187 logic ga tes, which is very small compared to other approaches, and shows a performa nce which is applicable to moving pictures.