ON FAULT PROBABILITIES AND YIELD MODELS FOR VLSI NEURAL NETWORKS

Authors
FURTH PM ANDREOU AG
Citation
Pm. Furth et Ag. Andreou, ON FAULT PROBABILITIES AND YIELD MODELS FOR VLSI NEURAL NETWORKS, IEEE journal of solid-state circuits, 32(8), 1997, pp. 1284-1287
Citations number
14
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
32
Issue
8
Year of publication
1997
Pages
1284 - 1287
Database
ISI
SICI code
0018-9200(1997)32:8<1284:OFPAYM>2.0.ZU;2-Y
Abstract
We investigate the estimation of fault probabilities and yield for ver y large scale integration (VLSI) implementations of neural computation al models. Our analysis is limited to structures that can be mapped di rectly onto silicon as truly distributed parallel processing systems. Our work improves on the framework suggested by Feltham and Maly and i s also applicable to analog or mixed analog/digital VLSI systems.