Self-aligned double-gate single-electron transistor derived from 0.12-mu m-scale electron-beam lithography

A single-electron transistor (SET) with two gates was fabricated via the se lf-aligned evaporation of Al into a trench structure comprised of Si and Si O2. The initial trench, which was comparable to 0.12 mum lines and defined by electron-beam lithography, was reduced to 0.05x0.02 mum by a slightly an isotropic etching characteristic. These processes allow for the production of SET devices using current silicon fabrication techniques. The simultaneo us formation of two gates allows for one gate to be used to control the bac kground charge of each device. The shift of Coulomb oscillation peaks was c learly shown by controlling the second gate bias. An inverter logic operati on at a temperature of 5 K with a gain of 1.3 was obtained. These character istics indicate that such SET logic devices, based on a combination of the good performance of the Al SET and the high level of control of the fabrica tion of Si technology, have considerable potential for future use. (C) 2001 American Institute of Physics.