Multilayer interconnect technology for scaling

With the miniaturization of silicon ultralarge-scale integrated circuits (U LSI), the increase in interconnect delay exceeds the delay time of the tran sistors, and the interconnect begins to control the performance of the enti re ULSI chip. To enhance further the speed of ULSI, it is necessary to solv e the problem of large-distance propagation of high-speed signals in the la rge-scale chip. The damascene multilayer interconnect integration technolog y is an important interconnect technology for achieving large-scale integra tion and high speed in ULSI at low cost. CMP technology, Cu electroplating technology, and low dielectric-constant insulating film layers are describe d as element process technologies required for its implementation. (C) 2001 Scripta Technica, Electron Comm Jpn Pt 2, 84(4): 26-40, 2001.