A major issue in router design for the next generation Internet is the fast
IP address lookup mechanism. The existing scheme by Huang et al. performs
the IP address lookup in hardware in which the forwarding table can be comp
ressed to fit into reasonable-size SRAM, and a lookup can be accomplished i
n three memory accesses. In this letter, we claim that with a little extra
memory, it is able to further reduce the lookup time to two memory accesses
.