Explicit analysis of channel mismatch effects in time-interleaved ADC systems
Citation
N. Kurosawa et al., Explicit analysis of channel mismatch effects in time-interleaved ADC systems, IEEE CIRC-I, 48(3), 2001, pp. 261-271
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
SICI code
1057-7122(200103)48:3<261:EAOCME>2.0.ZU;2-4
Abstract
A time-interleaved A-D converter (ADC) system is an effective way to implem
ent a high-sampling-rate ADC with relatively slow circuits. In the system,
several channel ADCs operate at interleaved sampling times as if they were
effectively an effective way to implement a high-sampling rate ADC with rel
atively slow circuits. In the system, several channel ADCs analog CK1 opera
te at interleaved sampling times as if they were effectively a single ADC o
perating at a much higher sampling rate. However, mismatches such as offset
, gain mismatches among channel ADCs as well as timing skew of the clocks d
istributed to them degrade S/N of the ADC system as a whole. This paper ana
lyzes the channel mismatch effects in the time-interleaved ADC system. Prev
ious analysis showed the effect for each mismatch individually, however in
this paper we derive explicit formulas for the mismatch effects when all of
offset, gain and timing mismatches exist together. We have clarified that
the gain and timing mismatch effects interact with each other but the offse
t mismatch effect is independent from them, and this can be seen clearly in
frequency domain. We also discuss the band width mismatch effect. The deri
ved formulas can be used for calibration algorithms to compensate for the c
hannel mismatch effects.