This paper presents a VLSI architecture to implement the forward and invers
e two dimensional Discrete Wavelet Transform (DWT), to compress medical ima
ges for storage and retrieval. Lossless compression is usually required in
the medical image field. The word length required for lossless compression
makes too expensive the area cost of the architectures that appear in the l
iterature. Thus, there is a clear need for designing a cost-effective archi
tecture to implement the lossless compression of medical images using DWT.
The data path word length has been selected to ensure the lossless accuracy
criteria leading a high speed implementation with small chip area. The pyr
amid algorithm is reorganized and the algorithm locality is improved in ord
er to obtain an efficient hardware implementation. The result is a pipeline
d architecture that supports single chip implementation in VLSI technology.
The implementation employs only one multiplier and 352 memory elements to
compute all scales what results in a considerable smaller chip area (45mm(2
)) than former implementations. The hardware design has been captured by me
ans of the VHDL language and simulated on data taken from random images. Im
plemented in a 0.7 mum technology, it can compute both the forward and inve
rse DWT at a rate of 3.5 512 x 512 12 bit images/s corresponding to a clock
speed of 33 MHz. This chip is the core of a PCI board that will speedup th
e DWT computation on desktop computers. (C) 2001 Academic Press.