One of the primary advantages of a high-level synthesis system is its abili
ty to explore the design space. This paper presents several methodologies f
or design space exploration that compute all optimal tradeoff points for th
e combined problem of scheduling, clock-length determination, and module se
lection. We discuss how each methodology takes advantage of the structure w
ithin the design space itself as well as the structure of, and interactions
among, each of the three subproblems.