A codesign back-end approach for embedded system design

Continuous advances in processor and ASIC technologies enable the integrati on of more and more complex embedded systems. Since their implementations g enerally require the use of heterogeneous resources (e. g., processor cores , ASICs) in one system with stringent design constraints, the importance of hardware/software codesign methodologies increases steadily. Interfacing h eterogeneous hardware and software components together through a communicat ion structure is particularly error prone and time consuming. Hence, on the basis of a generic architecture dedicated to telecommunication and multime dia applications, we propose an extended communication synthesis method tha t provides characterization of communications and their implementation sche mes in the target architecture. This method takes place after the partition ing and scheduling phase and may constitute the basis of a back-end of a co design framework leading to HW/SW integration.