On-chip vs. off-chip memory: The data partitioning problem in embedded processor-based systems

Efficient utilization of on-chip memory space is extremely important in mod ern embedded system applications based on processor cores. In addition to a data cache that interfaces with slower off-chip memory, a fast on-chip SRA M, called Scratch-Pad memory, is often used in several applications, so tha t critical data can be stored there with a guaranteed fast access time. We present a technique for efficiently exploiting on-chip Scratch-Pad memory b y partitioning the application's scalar and arrayed variables into off-chip DRAM and on-chip Scratch-Pad SRAM, with the goal of minimizing the total e xecution time of embedded applications. We also present extensions of our p roposed memory assignment strategy to handle context switching between mult iple programs, as well as a generalized memory hierarchy. Our experiments o n code kernels from typical applications show that our technique results in significant performance improvements.