Stochastic interconnect modeling, power trends, and performance characterization of 3-D circuits

Three-dimensional (3-D) technology promises higher integration density and lower interconnection complexity and delay, At present, however, not much w ork on circuit applications has been done due to lack of insight into 3-D c ircuit architecture and performance, One of the purposes of realizing 3-D i ntegration is to reduce the interconnect complexity and delay of two dimens ions (2-D), which are widely considered as the barriers to continued perfor mance gains in future technology generations. Thus, understanding the inter connect and its related issues, such as the impact on circuit performance, is key to 3-D circuit applications. In this paper, we present a stochastic 3-D interconnect model and study the impact of 3-D integration on circuit p erformance and power consumption. To model 3-D interconnect, we divide 3-D wires into two parts (horizontal w ires and vertical wires) and derive their stochastic distributions. Based o n those distributions, we estimate the delay distribution. We show that 3-D structures effectively reduce the number of long delay nets, significantly reduce the number of repeaters, and dramatically improve circuit performan ce. With 3-D integration, circuits can be clocked at frequencies much highe r (double or even triple) than 2-D.