Projecting lifetime of deep submicron MOSFETs

A detailed examination of hot-carrier-induced degradation in MOSFETs from a 0.25-mum and a 0.1-mum technology is performed. Although the worst case st ress condition depends on the stress voltage, channel length, and oxide thi ckness, I-b,I-peak is projected to be the worst case stress condition at th e operating voltage for both nMOSFETs and pMOSFETs, Post-metallization anne al (PMA) in Deuterium can significantly improve the device lifetime if the primary degradation mechanism at the stress condition is interface trap gen eration due to interface depassivation by energetic electrons.