Determination and assessment of the floating-body voltage of SOICMOS devices

A self-consistent method to extract the off-state floating-body (FB) voltag e of SOI CMOS devices is presented. The technique is simple and is based on CV and S-parameter measurements of a single standard SOI MOSFET device; no special test structure design is needed. The bias dependent S-parameter me asurements of the FB SOI device and its equivalent circuit, along with the CV measurements between the drain and source of the same device, are used t o determine the FB voltage, The technique provides reasonable insight on de vice off-state and leakage performances that are important for digital appl ications. Additionally, it proposes a method for the extraction of the para sitic source, drain, and gate resistances, Using the technique,FB voltage i n excess of 0.4 V is measured in a partially depleted (PD) NMOS device at d rain voltage of 2.5 V and zero gate voltage, demonstrating the importance o f understanding FB effects on device off-state and junction leakage perform ances.