Charge-trap memory device fabricated by oxidation of Si1-xGex

In this work, we describe a novel technique of fabricating germanium nanocr ystal quasinonvolatile memory device. The device consists of a metal-oxide- semiconductor field-effect transistor (MOSFET) with Ge charge-traps embedde d within the gate dielectric. The trap formation method provides for precis e control of the thicknesses of the top (control) and bottom (tunneling) ox ide layers which sandwich the charge-traps, via thermal oxidation. This mem ory device exhibits write/erase speed/voltage and retention time superior t o previously reported nano-crystal or charge-trap memory devices, A detaile d description of the novel process for fabricating the Ge charge-trap MOS m emory is given, along with the resultant memory-cell performance characteri stics.