On-current modeling of large-grain polycrystalline silicon thin-film transistors

Citation
Fv. Farmakis et al., On-current modeling of large-grain polycrystalline silicon thin-film transistors, IEEE DEVICE, 48(4), 2001, pp. 701-706
Citations number
14
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
00189383 → ACNP
Volume
48
Issue
4
Year of publication
2001
Pages
701 - 706
Database
ISI
SICI code
0018-9383(200104)48:4<701:OMOLPS>2.0.ZU;2-I
Abstract
Large-grain excimer laser-annealed polysilicon TFTs are studied. Due to the large grain size of the polysilicon film (about 2.5 mum), we propose a mod el for the on-current (above threshold voltage) taking into account the num ber of grain boundaries within the channel. This linear-region model consid ers grain and grain boundaries as two noncorrelated regions within the chan nel of a polysilicon TFT. The trap density at the grain boundaries and the device parameters involved in this model are determined by fitting the expe rimental transfer characteristic in the linear regime. Moreover, we show th at the proposed model provides reliable results within a temperature range from 150 K to 300 K, Finally, it serves to optimize the energy density of l aser annealing and to make predictions about polysilicon TFT technology, si nce TFTs performances versus grain size plots can be obtained.